INFORMAZIONI SU

Parallel Architectures (the English translation of "Architetture parallele")

Parallel Architectures (traduzione in inglese del programma di Architetture parallele - integrato con Calcolatori elettronici e sistemi operativi) - cdl magistrale in Ingegneria Elettronica

Teacher

prof. Antonio ABRAMO

Credits

6 CFU

Language

Italian

Objectives

The class aims at providing the skills required to face the study and design of distributed applications on parallel and heterogeneous architectures. 
The class features a significant amount of lab activities where design of parallel algorithms on massively parallela architectures in CUDA.

Acquired skills

- Knowledge about main distributed computing paradigms.
- Knowledge about the design issues concerning parallel applications.
- Programming applications in CUDA and OpenCL.

Lectures and exercises (topics and specific content)

Parallel architectures: the meaning of parallelism; Flynn tassonomy; memory topologies; Message Passing and Shared Memory models; MIMD and SIMD architectures; Systolic and dataflow architectures; Neural architectures; the parallel software, naming, ordering, decomposition, orchestration, mapping, synchronization (12 hours).
Massively parallel architectures: GPU, architetture, memory types and management, threads and kernels, host and GPU management, synchronization and monadic operations, multi-GPU management (12 hours).
The CUDA language: language elements, application examples, lab assignement and project design (18 hours).
The OpenCL language: language elements, application examples, lab assignement and project design (18 hours).
Exercises (36 hours).

References

- D.B. Kirk, W-m.W Hwu, "Programming Massively Parallel Processors: A Hands-on Approach", Morgan-Kaufmann

Type of exam

Written

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